DAE CIT 244 | Electronics - II | PAPER - A | Chapter 4 : Sequential Logic Circuits | MCQs

CIT 244

Electronics - II

PAPER - A

Chapter 4 : Sequential Logic Circuits

DAE Computer Information Technology | Second Year

Multiple Choice Questions

Chapter 1 Chapter 2 Chapter 3 Chapter 4 Chapter 5 Chapter 6 Chapter 7 Chapter 8 Chapter 9 Chapter 10

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Chapter 4 : Sequential Logic Circuits

Question 1:

Following is the reset condition of a flip flop.

𝑄 = 0 & \(\overline{𝑄}\) = 1 𝑄 = 0 & \(\overline{𝑄}\) = 0 𝑄 = 1 & \(\overline{𝑄}\) = 0 𝑄 = 1 & \(\overline{𝑄}\) = 1

Question 2:

If J = 1 and K = 0, then condition of flip flop will be

Reset Set Toggle Forbidden

Question 3:

A 555 timer IC has

3 pins 6 pins 8 pins 12 pins

Question 4:

A flip flop has number of stable states

One Two Three Four

Question 5:

Which flip flop is called universal flip flop?

RS D JK T

Question 6:

The pin number 6 of 555 timer IC is

Trigger Threshold Discharge Control

Question 7:

D flip flop is also called

Data flip flop Delay flip flop D type latch All of these

Question 8:

Following is the set condition of a flip flop.

𝑄 = 0 & \(\overline{𝑄}\) = 1 𝑄 = 0 & \(\overline{𝑄}\) = 0 𝑄 = 1 & \(\overline{𝑄}\) = 0 𝑄 = 1 & \(\overline{𝑄}\) = 1

Question 9:

A 555 timer IC have comparators

Two Three Four Five

Question 10:

In clocked RS flip flop when all three inputs are zero, then flip flop state is

Forbidden Reset Hold Set

Quiz Results

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Incorrect Answers:

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Chapter 1 Chapter 2 Chapter 3 Chapter 4 Chapter 5 Chapter 6 Chapter 7 Chapter 8 Chapter 9 Chapter 10